Milk-V recently released specifications for the Milk-V Vega which is described as the first RISC-V 10 Gigabit Ethernet Switch implemented on the FSL1030M network switch chip. The company also mentions that the device is built on an open-source Linux system.
The product announcement highlights that the FSL91030M is based on the UX608 uCore by Nuclei System Technology. The uCore also supports the RV32/64 IMACFDPB instruction set, features a 6-stage variable-length pipeline architecture and incorporates a 64-bit AXI system bus interface. Unmanaged Switch
FXL1030M and UX608 uCore block diagram (click image to enlarge)
The FSL91030M integrates a comprehensive range of networking capabilities. It incorporates 8 ports of gigabit Ethernet PHY that support various functionalities including 10/100/1000BASE-T and 100BASE-FX. Moreover, the board integrates 2 ports of 10G SerDes, enabling 1000BASE-X, SGMII, QSGMII, O-USGMII, and 10GBASE-R.
Milk-V Vega specifications (click image to enlarge)
Similarly, the FSL91030M offers 4 ports of 1G SerDes designed to support 1000BASE-X and SGMII functionalities. For more details, please refer to the table below.
Milk-V Vega (click images to enlarge)
Furthermore, the uCore is compatible with standard JTAG and cJTAG debugging interfaces, along with compile toolchains compliant with the RISC-V standard, and graphical integrated development environments (IDEs) for both Linux and Windows.
Network Features Support listed for the listed Milk-V Vega:
Milk-V Vega features offered for developers:
Tplink Poe Switch Pricing information for the Milk-V Vega has not been revealed by MILK-V. The product announcement can be found here and the product page is available on the official MILK-V website. Additional technical information might be found on the Milk-V Wiki pages in the near future.